74HC4052PW-Q100,11

The 74HC4052PW-Q100 is a dual 4-channel Analog Multiplexer/Demultiplexer with common select logic. It is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). Each multiplexer has four independent inputs/outputs (pins nY0 to nY3) and a common input/output (pin nZ). The common channel select logics include two digital select inputs (pins S0 and S1) and an active LOW enable input (pin E). VCC and GND are the supply voltage pins for the digital control inputs (pins S0, S1 and E). The analog inputs/outputs (pins nY0 to nY3 and nZ) can swing VEE may not exceed between VCC as a positive limit and VEE as a negative limit. For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically ground).